gnetlist - gEDA/gaf Netlist Extraction and Generation
gnetlist [OPTION...] [-p BACKEND|-g BACKEND] [--] FILE...
gnetlist is a netlist extraction and generation tool and is part of the gEDA (GPL Electronic Design Automation) toolset. It takes one or multiple electronic schematics as input and outputs a netlist. A netlist is a machine-interpretable description of the way that components in an electronic circuit are connected together and is commonly used as the input to a PCB layout program such as pcb(1) or to a simulator such as gnucap(1).
A normal gnetlist run is carried out in two steps. First, the gnetlist frontend loads the specified human-readable schematic FILEs and compiles them to an in-memory netlist description. Then, a BACKEND is used to export the connection and component data to one of many supported netlist formats.
gnetlist is extensible in Python and Scheme.
-q |
Quiet mode. Turns off all warnings/notes/messages. |
-v, --verbose
Verbose mode. Output all diagnostic information.
-L DIRECTORY
Prepend DIRECTORY to the list of directories to be searched for Python backends, Scheme backends, and other Scheme files.
-p BACKEND
Specify the Python netlist backend to be used.
-g BACKEND
Specify the Scheme netlist backend to be used.
-O STRING
Pass an option string to the backend.
--list-backends
Print a list of available netlist backends. A backend name is prefixed with the letters ’P’ and ’G’ in brackets if it is available as a Python and as a Scheme backend, respectively.
-o FILE |
Specify the filename for the generated netlist. By default, output is directed to ’output.net’. If ’-’ is given instead of a filename, the output is directed to the standard output. | ||
-l FILE |
Specify a Scheme file to be loaded before the backend is loaded or executed. This option can be specified multiple times. | ||
-m FILE |
Specify a Scheme file to be loaded between loading the backend and executing it. This option can be specified multiple times. | ||
-c EXPR |
Specify a Scheme expression to be executed during gnetlist startup. This option can be specified multiple times. | ||
-i |
After the schematic files have been loaded and the netlist generated, enter an interactive Python interpreter. The netlist structure is available as ’netlist’ in the local dictionary. |
--report-gui
Report warnings and errors in a GUI dialog.
-h, --help
Print a help message.
-V, --version
Print gnetlist version information.
-- |
Treat all remaining arguments as schematic filenames. Use this if you have a schematic filename which begins with ’-’. |
Currently, gnetlist includes the following backends:
allegro |
Allegro netlist format. |
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bae |
Bartels Autoengineer netlist format. |
bom, bom2
Bill of materials generation.
calay |
Calay netlist format. |
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cascade |
RF Cascade netlist format. |
drc, drc2
Design rule checkers (drc2 is recommended).
dumpindent, dumpjson, dumplihata, dumptext, dumpxml
Dump the netlist in various generic formats.
eagle |
Eagle netlist format. | ||
ewnet |
Netlist format for National Instruments ULTIboard layout tool. |
futurenet2
Futurenet2 netlist format.
geda |
Internal gEDA netlist format (used for testing and diagnostics). | ||
gossip |
Gossip netlist format. |
gsch2pcb
Backend used for pcb(1) file layout generation by gsch2pcb(1). It is not recommended to use this backend directly.
guile |
Compatibility layer for old backends written in Scheme. |
liquidpcb
LiquidPCB netlist format.
makedpend
Auto-generate dependencies for Makefiles.
mathematica
Netlister for analytical circuit solving using Mathematica.
maxascii
MAXASCII netlist format.
osmond |
Osmond netlist format. |
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pads |
PADS netlist format. |
partslist1, partslist2, partslist3
Bill of materials generation backends (alternatives to bom and bom2).
PCB |
pcb(1) netlist format. | ||
pcbfwd |
Internally used by pcb(1)’s "Import Schematics" mechanism. | ||
pcbpins |
Generates a pcb(1) action file for forward annotating pin/pad names from schematic to layout. |
protelII
Protel II netlist format.
redac |
RACAL-REDAC netlist format. |
spice, spice-sdb, spice-noqsi
SPICE-compatible netlist format (spice-sdb and spice-noqsi are recommended). Suitable for use with gnucap(1).
switcap |
SWITCAP switched capacitor simulator netlist format. | ||
systemc |
Structural SystemC code generation. | ||
tango |
Tango netlist format. | ||
tedax |
tEDAx netlist format (used by pcb-rnd(1)). | ||
vams |
VHDL-AMS code generation. | ||
verilog |
Verilog code generation. | ||
vhdl |
VHDL code generation. | ||
vipec |
ViPEC Network Analyser netlist format. |
These examples assume that you have a schematic file ’stack_1.sch’ in the current directory.
gnetlist requires that at least one schematic and either a Python backend, a Scheme backend, or interactive mode are specified on the command line. If a backend name is specified with ’-p BACKEND’ (for a Python backend) or ’-g BACKEND’ (for a Scheme backend), gnetlist will output a netlist:
gnetlist -p dumptext stack_1.sch
The netlist
output will be written to a file called
’output.net’
in the current working directory.
You can specify the output filename by using the ’-o’ option:
gnetlist -p dumptext -o /tmp/stack.netlist stack_1.sch |
Output will now be directed to ’/tmp/stack.netlist’.
You could run
(for example) the ’spice-sdb’ backend against
the
schematic if you specified ’-p spice-sdb’, or
you could generate a
bill of materials for the schematic using ’-p
partslist1’.
To obtain a
Python prompt to run Python commands directly, you can
use the ’-i’ option.
gnetlist -i stack_1.sch |
gnetlist
will load ’stack_1.sh’ and then enter an
interactive
Python interpreter. The netlist structure is available as
’netlist’
in the local dictionary.
GEDADATA
specifies the search directory for Scheme and rc files. The default is ’${prefix}/share/gEDA’.
GEDADATARC
specifies the search directory for rc files. The default is ’$GEDADATA’.
See the ’AUTHORS’ file included with this program.
Copyright
© 1999-2020 gEDA Contributors. License GPLv2+: GNU GPL
version 2 or later. Please see the ’COPYING’
file included with this
program for full details.
This is free
software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
gschem(1), gsymcheck(1), pcb(1), pcb-rnd(1), gnucap(1)